1. Field of the Invention
The present invention relates to a method for forming thin oxide regions particularly in electrically erasable and programmable read-only memory cells.
2. Discussion of the Related Art
In conventional electrically erasable and programmable read-only memory cells, technically known as EEPROMs, it is advantageous to delimit an oxide portion in which it is possible to grow a thinner oxide, so that the electric writing and erasure of the cell can occur through such portion.
One of the problems encountered with these EEPROM devices is caused by the lithographic process. As is known to those skilled in the art, the dimensional limit for a given technology is set by the photolithographic method employed, through which it is possible to define structures whose dimensions exceed a given value.
Furthermore, radiation-induced damage due to so-called "dry etching" often occurs in these devices. This type of etching does not allow removal of the gate oxide from a surface portion which is greater than the desired tunnel dimensions.
In addition to the problem which arises from the type of etching, it is also very difficult to etch the oxide on limited areas, because one must work at the limit of what is technologically feasible.
Another problem associated with conventional EEPROM cells is related to controlling the dimensions of the tunnel portion, whose variability affects the capacitive coupling of the cell and thus its electric performance.